Only one <select> input should be high when <recall> is high (thus the <select> inputs are usually routed through an Interlock symbol). This means that only one set of values can be recalled at one time.
Speed Key Name: dram
Signals
Digital inputs: <store>, <recall>, <i1> through <i999>, <select1> through <select999>
For each <i> input, one corresponding digital output: <o1> through <o999>
Description
The Digital RAM symbol stores the current values of all its digital <i> inputs in NVRAM (non-volatile RAM) whenever the <store> input goes high while any one or more <select> inputs is high.
The stored values are recalled:
Whenever a given <select> input goes high while <recall> is high;
or
Whenever <recall> goes high while a <select> input is high and <store> is low.
Every <i> input has a corresponding <o> output, and each input/output pair is independent of other input/output pairs. (In normal applications, each input/output pair will have the same signal name.)
Only one <select> input should be high when <recall> is high (thus the <select> inputs are usually routed through an Interlock symbol). This means that only one set of values can be recalled at one time.
If only one <select> input is defined (there must be at least one <select> input), it can be given the signal name 1.
If <recall> is given the signal name 1, at startup the output signals will be set to the stored values that correspond to whichever <select> input is high.
If <store> and <recall> both have the signal name 1 and each digital input/output pair has the same signal name, signals will flow uninterrupted. At startup the output signals will be set to the stored values that correspond to whichever <select> input is high.
See also Analog RAM, Serial RAM